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  l tc1064-4 1 10644fb features applicatio s u descriptio u typical applicatio u antialiasing filters telecom filters sinewave generators 8th order filter in a 14-pin package 80db or more stopband attenuation at 2 f cutoff 50:1, f clk to f cutoff ratio (cauer) 100:1, f clk to f ?db ratio (transitional) 135 v rms total wideband noise 0.03% thd or better 100khz maximum f cutoff frequency operates up to 8v power supplies input frequency range up to 50 times the filtercutoff frequency low noise, 8th order, clock sweepable cauer lowpass filter the ltc 1064-4 is an 8th order, clock sweepable cauer lowpass switched capacitor filter. an external ttl orcmos clock programs the value of the filter? cutoff frequency. with pin 10 at v + , the f clk to f cutoff ratio is 50:1; the filter has a cauer response and with compensa-tion the passband ripple is 0.1db. the stopband attenu- ation is 80db at 2 f cutoff . cutoff frequencies up to 100khz can be achieved. with pin 10 at v , the f clk to f 3db ratio is 100:1, the filter has a transitional butterworth- cauer response with lower noise and lower delaynonlinearity than the cauer response. the stopband attenuation at 2.5 f ?db is 92db. cutoff frequencies up to 50khz can be achieved.the ltc1064-4 features low noise and low harmonic distortion even when input voltages up to 3v rms are applied. the ltc1064-4 overall performance competeswith equivalent multiple op amp active realizations. the ltc1064-4 is pin compatible with the ltc1064-1, ltc1064-2 and ltc1064-3. the ltc1064-4 is manufactured using linear technology? enhanced ltcmos tm silicon gate process. 8th order clock sweepable lowpass elliptic filter frequency response frequency (hz) 1k v out /v in (db) 20 0 ?0 ?0 ?0 ?0 100 10k 100k 1m 1064-4 ta01b f clk = 1mhz, 100:1 t a = 25 c f clk = 2mhz, 50:1 f clk = 5mhz, 50:1 c comp1 = 30pf, c comp2 = 18pf * for frequencies above 20khz and minimum passband ripple refer to the pin description section for compensation guidelines. v + /v ltc1064-4 12 3 4 5 6 7 1413 12 11 10 9 8 r(h, i) comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a 1064 ta01 clock(ttl, 5mhz) ?v 8v v out v in 0.1 f 0.1 f note:the power supplies should be bypassed by a 0.1 f capacitor close to the package. bypassing pin 10 with 0.1 f capacitor reduces clock feedthrough. the connection between pins 7 and 14 should be physically done under the package. ltcmos is a trademark of linear technology corporation. , ltc and lt are registered trademarks of linear technology corporation. downloaded from: http:///
l tc1064-4 2 10644fb parameter conditions min typ max units passband gain referenced to 0db, 1hz to 0.05f cutoff 0.5 0.1 db gain tempco 0.0002 db/ c passband edge frequency, f c 20 1% khz gain at f c referenced to passband gain, f c = 20khz 0.4 0.7 db ?db frequency 50:1 (cauer response) 21.5 khz 100:1 (transitional response) 10 khz passband ripple (note 2) 0.1f c to 0.95f c referenced to passband gain ?.15 0.6 db stopband attenuation at 1.7f cutoff ?6 ?0 db stopband attenuation at 2f cutoff ?0 db input frequency range 50:1, pin 10 at v + 0f clk khz 100:1, pin 10 at v 0f clk /2 khz output voltage swing and v s = 2.37v 1.1 v operating input voltage range v s = 5v 3.1 v v s = 7.5v 5.0 v total harmonic distortion v s = 5v, input = 1v rms at 1khz 0.015 % v s = 7.5v, input = 3v rms at 1khz 0.03 % wideband noise v s = 5v, input = gnd 1hz to 999khz 120 v rms v s = 7.5v, input = gnd 1hz to 999khz 135 v rms (note 1) consult ltc marketing for parts specified with wider operating temperature ranges. total supply voltage (v + to v ) ............................ 16.5v input voltage at any pin ...... v 0.3v v in v + +0.3v power dissipation .............................................. 400mw storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c operating temperature range ltc1064-4m (obsolete) ............... 55 c to 125 c ltc1064-4c ....................................... 40 c to 85 c the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 7.5v, 50:1, f clk = 1mhz, f c = 20khz, r1 = 10k, ttl clock input level unless otherwise specified. order part number ltc1064-4cn order part number ltc1064-4csw t jmax = 150 c, ja = 90 c/w t jmax = 110 c, ja = 70 c/w ltc1064-4mjltc1064-4cj obsolete package consider the n14 package for alternate source 12 3 4 5 6 7 top view j package 14-lead cerdip n package 14-lead pdip 1413 12 11 10 98 inv c v in agnd v + agnd comp1 inv a r(h, i)comp2 v f clk ratiov out nc 12 3 4 5 6 7 8 top view sw package 16-lead plastic (wide) so 1615 14 13 12 11 10 9 inv c v in agnd v + agnd nc comp1 inv a r(h, i)comp2 v ncf clk rationc v out electrical characteristics package/order i for atio uu w absolute axi u rati gs w ww u downloaded from: http:///
l tc1064-4 3 10644fb the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 7.5v, 50:1, f clk = 1mhz, f c = 20khz, r1 = 10k, ttl clock input level unless otherwise specified. parameter conditions min typ max units output dc offset v s = 7.5v 50 160 mv output dc offset tempco v s = 5v 100 v/ c v s = 7.5v 200 v/ c input impedance 91 3 k ? output impedance f out = 10khz 2 ? output short-circuit current source/sink 3/1 ma clock feedthrough input = gnd 200 v rms maximum clock frequency v s = 7.5v, 50% duty cycle (note 3) 5 mhz power supply current v s = 2.37v, f clk = 1mhz 11 22 ma v s = 5v, f clk = 1mhz 14 23 ma 26 ma v s = 7.5v, f clk = 1mhz 17 28 ma 32 ma power supply voltage range 2.37 8v gain vs frequency passband phase shift vs frequency passband group delay note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: for tighter passband ripple specifications please consult with ltc? marketing.note 3: not tested, guaranteed by design. frequency (khz) 220200 180 160 140 120 100 8060 40 20 0 group delay ( s) 1064-4 g03 061 0 12 14 16 18 20 22 24 8 v s = 7.5v t a = 25 c f c = 20khz f clk = 1mhz, 50:1 frequency (khz) 06 phase shift (deg) ?5 0 4590 135180 225 270 315 360 405 450 10 12 14 16 18 20 22 1064-4 g02 24 8 v s = 7.5v t a = 25 c f c = 20khz f clk = 1mhz, 50:1 frequency (hz) 10k gain (db) 15 0 ?5 ?0 ?5 ?0 ?5 ?0 ?05 100k 1m 1064-4 g01 v s = 7.5v t a = 25 c f clk = 2mhz, 50:1 electrical characteristics typical perfor a ce characteristics uw downloaded from: http:///
l tc1064-4 4 10644fb power supply current vs powersupply voltage table 1. wideband noise ( v rms ). input grounded, f clk = 1mhz gain vs frequency with compensation device to device phase matching total harmonic distortion frequency (hz) 10k gain (db) 50 ? ?0 ?5 ?0 ?5 ?0 ?5 100k 1m 1064-4 g04 t a = 125 c t a = 25 c for compensation informationsee pin description section v s = 7.5v f clk = 5mhz ratio = 50:1 input level (v rms ) 0.1 0.01 distortion (%) 0.1 1.0 11 0 1064-4 g06 v s = 7.5v v s = 5v v s = 2.37v f clk = 1mhz, 50:1 f cutoff = 20khz frequency (khz) 06 phase match ( deg) 5.55.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 10 12 14 16 18 20 22 1064-4 g05 24 8 v s = 7.5v f c = 20khz f clk = 1mhz, 50:1 50 unit sample (t a = 25 c to 125 c) transient responsef clk = 1mhz, ratio = 50:1, f c = 20khz, v s = 7.5v, 1khz square wave input total power supply voltage (v) 02 6 10 1 41822 power supply current (ma) 4844 40 36 32 28 24 20 16 12 84 0 481 2 16 1064-4 g07 20 24 f clk = 1mhz t a = 55 c t a = 25 c t a = 125 c 2v/div 0.1ms/div v s = 2.37v v s = 5v v s = 7.5v noise noise noise pin 10 to f clk /f cutoff v rms v rms v rms v + 50:1 120 135 145 v 100:1 100 120 130 typical perfor a ce characteristics uw downloaded from: http:///
l tc1064-4 5 10644fb table 2. gain/phase, pin 10 at v + , typical response f cutoff = 1khz, v s = 5v, t a = 25 c, f clk = 50khz, ratio = 50:1 table 3. gain/delay, pin 10 at v + , typical response f cutoff = 1khz, v s = 5v, t a = 25 c, f clk = 50khz, ratio = 50:1 frequency(khz) gain (db) phase (deg) 0.200 0.075 59.990 0.400 0.050 122.400 0.600 0.020 169.300 0.800 0.060 88.500 1.000 0.090 26.100 1.200 15.640 175.100 1.400 34.700 126.500 1.600 51.700 87.600 1.800 68.600 38.400 2.000 84.110 47.860 frequency(khz) gain (db) delay (ms) 0.200 0.074 0.844 0.300 0.070 0.867 0.400 0.050 0.899 0.500 0.020 0.949 0.600 0.020 1.021 0.700 0.050 1.122 0.800 0.060 1.275 0.900 0.120 1.592 1.000 0.090 2.160 1.100 5.020 2.070 1.200 15.650 1.288 table 4. gain/phase, pin 10 at v , typical response f ?db = 1khz, v s = 5v, t a = 25 c, f clk = 100khz, ratio = 100:1 frequency(khz) gain (db) phase (deg) 0.200 0.179 60.090 0.400 0.440 122.000 0.600 0.810 170.800 0.800 1.480 91.900 1.000 3.500 16.300 1.200 17.720 140.500 1.400 35.700 164.800 1.600 52.700 135.000 1.800 71.900 114.000 2.000 96.160 49.670 table 5. gain/delay, pin 10 at v , typical response f ?db = 1khz, v s = 5v, t a = 25 c, f clk = 100khz, ratio = 100:1 table 6. gain/phase, pin 10 at gndv s = 5v, t a = 25 c frequency(khz) gain (db) phase (deg) 0.200 0.383 47.140 0.400 1.000 92.000 0.600 1.300 134.300 0.800 0.280 178.800 1.000 2.670 109.200 1.200 3.500 6.000 1.400k 12.510 47.400 1.600 20.000 88.800 1.800 27.300 127.800 2.000 35.000 164.200 frequency(khz) gain (db) delay (ms) 0.200 0.174 0.842 0.300 0.300 0.861 0.400 0.440 0.888 0.500 0.610 0.933 0.600 0.810 0.999 0.700 1.090 1.095 0.800 1.480 1.242 0.900 2.080 1.503 1.000 3.500 1.832 1.100 8.720 1.724 1.200 17.720 1.183 typical perfor a ce characteristics uw downloaded from: http:///
l tc1064-4 6 10644fb typical perfor a ce characteristics uw frequency (khz) gain (db) phase (deg) 10.000 0.094 75.900 12.000 0.100 91.400 14.000 0.090 ?07.200 16.000 0.080 ?23.300 18.000 0.060 ?39.600 20.000 0.040 ?56.500 22.000 0.020 ?73.800 24.000 0.000 168.200 26.000 0.020 149.400 28.000 0.030 130.000 30.000 0.020 109.400 32.000 0.010 87.700 34.000 0.020 64.600 36.000 0.030 39.500 38.000 0.010 11.400 40.000 0.070 ?2.000 42.000 0.920 64.100 44.000 4.000 ?10.100 46.000 8.970 ?47.000 48.000 14.320 ?73.500 50.000 19.460 166.800 frequency (khz) gain (db) phase (deg) 10.000 0.096 32.390 20.000 0.100 64.900 30.000 0.080 98.100 40.000 0.040 ?32.300 50.000 0.020 ?68.200 60.000 0.070 153.600 70.000 0.040 112.100 80.000 0.120 66.400 90.000 0.460 14.600 100.000 1.310 49.300 110.000 5.640 129.000 120.000 14.530 167.800 130.000 23.800 126.700 140.000 32.600 96.200 150.000 41.000 71.300 160.000 49.200 49.200 170.000 57.500 29.000 180.000 66.500 9.800 190.000 77.770 2.320 200.000 92.050 76.740 frequency (khz) gain (db) phase (deg) 110.000 7.420 172.100 120.000 18.240 119.400 130.000 28.000 83.300 140.000 37.000 54.000 150.000 45.700 27.600 160.000 54.300 2.100 170.000 63.300 24.900 180.000 73.610 60.210 190.000 85.300 ?38.990 200.000 83.390 129.580 table 7. gain/phase for figure 6.typical response, pin 10 at v + , f cutoff = 40khz, v s = 7.5v, f clk = 2mhz, ratio = 50:1 table 8. gain/phase for figure 7.typical response, pin 10 at v + , f cutoff = 100khz, v s = 7.5v, t a = 25 c, f clk = 5mhz, ratio = 50:1 table 9. gain/phase for figure 7.typical response, pin 10 at v + f cutoff = 100khz, v s = 7.5v, t a = 125 c, f clk = 5mhz, ratio = 50:1 frequency (khz) gain (db) phase (deg) 10.000 0.071 33.800 20.000 0.040 67.800 30.000 0.050 102.500 40.000 0.190 138.300 50.000 0.410 176.100 60.000 0.670 143.100 70.000 0.920 98.400 80.000 1.150 48.200 90.000 1.530 10.900 100.000 1.110 96.500 downloaded from: http:///
l tc1064-4 7 10644fb uu u pi fu ctio s inv c, comp1, inv a, comp2 (pins 1, 6, 7 and 13): to obtain a cauer response with minimum passband rippleand cutoff frequencies above 20khz, compensating com- ponents are required. figure 6 uses 7.5v power supplies and compensation components to achieve up to 40khz sweepable cutoff frequencies and 0.1db passband ripple. table 7 lists the typical amplitude response of figure 6.figure 7 illustrates the compensation scheme required to obtain a 100khz cutoff frequency; graph 4 and tables 8 and 9 list the typical response of figure 7 for 25 c and 125 c ambient temperature. as shown the ripple in- creases at high temperatures but still a 0.25db figure can be obtained for ambient temperatures below 70 c. v in , v out (pins 2, 9): the input pin 2 is connected to a 12k resistor tied to the inverting input of an op amp. pin 2 is protected against static discharge. the device? output, pin 9, is the output of an op amp which can typically source/sink 3ma/1ma. although the internal op amps are unity gain stable, driving long coax cables is not recom- mended. when testing the device for noise and distortion, the output, pin 9, should be buffered (figure 4). the op amp power supply wire (or trace) should be connected directly to the power source. to eliminate any output clock feedthrough, pin 9 should be buffered with a simpler, c lowpass filter (figure 5). the cutoff frequency of the output filter should be f clk /3. agnd (pins 3, 5): for dual supply operation these pins should be connected to a ground plane. for single supplyoperation both pins should be tied to one half supply (figure 2). v + , v (pins 4, 12): should be bypassed with a 0.1 f capacitor to an adequate analog ground. low noise,nonswitching power supplies are recommended. to avoid latchup when the power supplies exhibit high turn-on transients, a 1n5817 schottky diode should be added from the v + and v pins to ground (figures 1 and 2). inv a, r(h, i) (pins 7, 14): a very short connection between pin 7 and pin 14 is recommended. this connec-tion should be preferably done under the ic package. in a breadboard, use a one inch, or less, shielded coaxial cable; the shield should be grounded. in a pc board, use a one inch trace or less; surround the trace by a ground plane. nc (pin 8 ): pin 8 is not internally connected, it should be preferably grounded.50/100 ratio (pin 10): for an f clk /f c ratio of 50:1, pin 10 should be tied to v + . for an f clk /f ?db ratio of 100:1, pin 10 should be tied to v . when pin 10 is at midsupplies (i.e. ground), the filter response is neithercauer nor transitional. table 6 illustrates this response. bypassing pin 10 with a 0.1 f capacitor reduces the already small clock feedthrough. (pin numbers refer to the 14-pin package) downloaded from: http:///
l tc1064-4 8 10644fb figure 3. level shifting the input t 2 l clock for single supply operation 6v. figure 4. buffering the filter output. the buffer op ampshould not share the ltc1064-4 power lines. figure 5. adding an output buffer-filter to eliminate any clock feedthrough.passband error of output buffer is 0.1db to 50khz, 3db at 94khz. ltc1064-4 12 3 4 5 6 7 1413 12 11 10 9 8 v + 1064-4 f03 0.1 f 5k 2.2k 5k 5k 1 f t 2 l level v + 1n5817 comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a r(h, i) v in v out lt c1064-4 12 3 4 5 6 7 1413 12 11 10 9 8 0.1 f 0.1 f 0.1 f 0.1 f v out + v v + power source 10k 10k 1064-4 f04 recommended op amps:lt1022, lt318, lt1056 v + /v 8 4 comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a r(h, i) v in ltc1064-4 12 3 4 5 6 7 1413 12 11 10 9 8 v + v + /v v 1064-4 f05 0.1 f 0.1 f v out + lt1056 200pf 430pf 10k 4.99k 4.99k 50 ? 0.027 f r(h, i) comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a v in figure 1. using schottky diodes to protectthe ic from power supply spikes figure 2. single supply operation. if fast power up or downtransients are expected, use a 1n5817 schottky diode between pin 4 and pin 5. ltc1064-4 12 3 4 5 6 7 1413 12 11 10 9 8 v + v 1064-4 f01 0.1 f 0.1 f 1n5817 1n5817 v + /v comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a r(h, i) v in v out ltc1064-4 12 3 4 5 6 7 1413 12 11 10 9 8 v + = 15v 1064-4 f02 0.1 f 0.1 f 5k 5k v + /2 1n5817 0v to 10v comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a r(h, i) v in v out typical applicatio s u downloaded from: http:///
l tc1064-4 9 10644fb u package descriptio j package 14-lead cerdip (narrow 0.300, hermetic) (ltc dwg # 05-08-1110) j14 0801 .045 ?.065 (1.143 ?1.651) .100 (2.54) bsc .014 ?.026 (0.360 ?0.660) .200 (5.080) max .015 ?.060 (0.381 ?1.524) .125 (3.175) min .300 bsc (7.62 bsc) .008 ?.018 (0.203 ?0.457) 0 ?15 1 234 56 7 .220 ?.310 (5.588 ?7.874) .785 (19.939) max .005 (0.127) min 14 11 8 9 10 13 12 .025 (0.635) rad typ note: lead dimensions apply to solder dip/plate or tin plate leads obsolete package downloaded from: http:///
l tc1064-4 10 10644fb n package 14-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) u package descriptio n14 1002 .020 (0.508) min .120 (3.048) min .130 .005 (3.302 0.127) .045 ?.065 (1.143 ?1.651) .065 (1.651) typ .018 .003 (0.457 0.076) .005 (0.125) min .255 .015* (6.477 0.381) .770* (19.558) max 3 1 2 4 5 6 7 8 9 10 11 12 13 14 .008 ?.015 (0.203 ?0.381) .300 ?.325 (7.620 ?8.255) .325 +.035?015 +0.889 0.381 8.255 () note:1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc downloaded from: http:///
l tc1064-4 11 10644fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s16 (wide) 0502 note 3 .398 ?.413 (10.109 ?10.490) note 4 16 15 14 13 12 11 10 9 1 n 23 4 5 6 78 n/2 .394 ?.419 (10.007 ?10.643) .037 ?.045 (0.940 ?1.143) .004 ?.012 (0.102 ?0.305) .093 ?.104 (2.362 ?2.642) .050 (1.270) bsc .014 ?.019 (0.356 ?0.482) typ 0 ?8 typ note 3 .009 ?.013 (0.229 ?0.330) .005 (0.127) rad min .016 ?.050 (0.406 ?1.270) .291 ?.299 (7.391 ?7.595) note 4 45 .010 ?.029 (0.254 ?0.737) inches (millimeters) note:1. dimensions in 2. drawing not to scale 3. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options 4. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) .420 min .325 .005 recommended solder pad layout .045 .005 n 123 n/2 .050 bsc .030 .005 typ sw package 16-lead plastic small outline (wide .300 inch) (reference ltc dwg # 05-08-1620) u package descriptio downloaded from: http:///
l tc1064-4 12 10644fb linear technology corporation 1 630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? l inear technology corporation 1991 lw/tp 1202 1k rev b ? printed in usa figure 6. compensating ltc1064-4 for passbandripple of 0.1db and f cutoff sweeps to 40khz. 12 3 4 5 6 7 1413 12 11 10 9 8 v + 1064-4 f06 1m 7.5v 0.1 f 7.5v 0.1 f 5pf 5pf 453k 2mhz ltc1064-4 comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a r(h, i) v in v out 12 3 4 5 6 7 1413 12 11 10 9 8 v + 1064-4 f07 1m 7.5v 0.1 f 7.5v 0.1 f 30pf 30pf 453k 5mhz ltc1064-4 comp2* v f clk 50/100 v out nc inv cv in agndv + agndcomp1* inv a r(h, i) v in v out figure 7. compensating ltc1064-4 for f cutoff = 100khz, gain at f cutoff = ?.3db, table 8. typical applicatio s u part number description comments ltc1069-1 8th order elliptic lowpass s0-8 p ackage, low power ltc1069-6 single supply, 8th order elliptic lowpass s0-8 package, very low power ltc1569-6 dc accurate, 10th order lowpass internal precision clock, low power, s0-8 package ltc1569-7 dc accurate, 10th order lowpass internal precision clock, delay equalized, s0-8 package related parts downloaded from: http:///


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